License Management
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2021/12/logo_ancl_w.png) |
HPC environment integrated operation middleware ShareTask
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RTL Design
Digital Implementation and Verification Analog Implementation and Verification
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2021/11/scientific_analog_logo-300x94.png) |
Generate high quality SystemVerilog models from analog circuits and verify
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RTL Design
Low-power Design
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2022/01/baum_logo.png) |
RTL high accuracy and high speed power consumption analysis
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SPICE Modeling
Analog ,Chip-level Verification Noise Measurement
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2021/11/logo_primarius.png) |
SPICE Simulator, Modelling tool, Noise measurement
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Analog Implementation and Verification
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2021/11/logo_meister_b.png) |
Integrated Circuit design and layout design system
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IP
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2021/11/logo_siliconc.png) |
The most-advanced process IP: PLL/SerDes/LVDS-IO
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IP
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2021/12/logo_truechip.png) |
Verification IP Tool set (USB~AMBA over80)
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IP
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2023/11/logo_i-highway_w.png) |
PTU ( Protocol Termination Unit )
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EM analysis
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2023/11/logo_lorentz.png) |
EM analysis platform IC・Package・PCB
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Mask Data Preparation (MDP)
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2023/11/logo_xyalis.png) |
MDP tool set
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Cross section shape simulation
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2023/11/logo_nttdata.png) |
Cross section shape simulation
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Process simulation
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2024/01/logo_kwtech.png) |
Plasma etching simulation
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Board Implementation
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2021/11/logo_simplify.png) |
High wiring rate topology-based auto routing
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EMC Verification
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2023/11/logo_simyog.png) |
EMC Virtual Laboratory (RE/CE/RI/CI)
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Photomask Verification
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![](https://www.newjedat.arum-net.com/wp-content/uploads/2021/12/HOTSCOPE02-300x39.png) |
Analysis browser for DFM/Photomask verification
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